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DAC8531
11
SBAS192B
www.ti.com
THEORY OF OPERATION
DAC SECTION
The architecture consists of a string DAC followed by an
output buffer amplifier. Figure 1 shows a block diagram of the
DAC architecture.
CODE CHANGE GLITCH
Time (2
s/div)
V
OUT
(20mV/div)
Glitch Waveform (20mV/div)
TYPICAL CHARACTERISTICS: VDD = 2.7V (Cont.)
At TA = +25°C, VDD = 2.7V, unless otherwise noted.
RESISTOR STRING
Figure 2 shows the resistor string section. It is simply a string
of resistors, each of value R. The code loaded into the DAC
register determines at which node on the string the voltage
is tapped off to be fed into the output amplifier by closing one
of the switches connecting the string to the amplifier. It is
ensured monotonic because it is a string of resistors.
FIGURE 1. DAC8531 Architecture.
The input coding to the DAC8531 is straight binary, so the
ideal output voltage is given by:
VV
D
OUT
REF
=
65536
where D = decimal equivalent of the binary code that is
loaded to the DAC register; it can range from 0 to 65535.
FIGURE 2. Resistor String.
DAC Register
REF (+)
Resistor String
REF(–)
Output
Amplifier
GND
V
DD
V
OUT
V
FB
To Output
Amplifier
R
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